Main advantages of transistor abstraction.

• large acceleration of classic validation methods
• brings new validation methodologies
• generation of a high level RTL model which exactly matches the original analog or digital transistor-level circuit, leveraging AMS simulation, debugging tasks, DFT (Design For Test), shrink of technology, old legacy IPs resurrection, reverse engineering...

Acceleration of classic techniques

Analog simulation

Taking the fastest analog simulator as a reference, the acceleration factor compared with TLL’s digital simulation can be anything between 200 and 16 000 depending on the type of circuit.

Symbolic simulation

With symbolic simulation, acceleration factors of between 80 and 200 are typically observed.

AMS simulations

Recalling that abstraction can be applied on all kind of analog transistor circuits whose behavior can be expressed logically, it's particularly well suited in an AMS by-simulation validation flow, where "digital" parts are formally expressed through high-level abstracted models, thanks to the 100% formal nature of abstraction process.

New methods

Equivalence Checking

Abstraction brings the possibility of equivalence checking between a circuit and its reference! Once in place, it 100% guarantees the functional validation of the circuit and produces results which are much easier to analyse when there are problems.

Property checking

Abstraction also offers the possibility of transistor level properties verification.

Others applications

The generation of a high level model, exactly reflecting the original circuit, allows the use of numerous applications, such as:

Debugging

The longer the critical paths, the longer the time required to run simulations (analog or symbolic). The more complex the design the more involved the work of analysing the results. Finding a bug in a circuit is a task which increases more than linearly with the size of the circuit. In comparison, abstraction gives a static, zero-delay result of which the size (and thus the analysis) is proportional to the size of the circuit: the more complex the design, the more abstraction simplifies the task of debugging.

ATPG (Automated Test Pattern Generation)

Assuming that the abstraction tool can be configured to produce a suitable model (which is the case with TLL), the abstraction provides an excellent description which can then be used with ATPG tools: the circuit structure is maintained, with the same signal names and same hierarchy.

Re-use of legacy technologies / reverse ingineering

In certain cases, high-level specifications are not available, only an undocumented circuit. In this case, abstraction allows a description of the circuit to be produced, which can then be used as a base documentation to perform a synthesis in another technology...

Economise !!

Because abstraction techniques allow simulation times to be reduced, fewer simulator licences are required to perform a greater amount of testing. Users lose less time in waiting for simulation results. On small circuits, (library elements for example) a simple visual check of the model (eg in the GUI of TLL) is sufficient to verify the circuit. Drastically increase test coverage on digital or AMS simulations to avoid any doubt on functionality.
If a change of methodology is envisaged, equivalence checking brings even more benefits, since the simplicity and quality of verification is improved in addition to the savings in time.