Transistors abstraction for functional validation and/or simulation of transistor-level circuits
The most common methods for the verification of transistor-level circuits (analog simulation, symbolic simulation) are costly in terms of time and IT resources. As a result, test coverage of complex circuits is often compromised, and finding bugs from simulation results can be a long and difficult process. Transistor abstraction is a process which produces a much more compact and higher level view of the circuit behaviour. Such abstraction permits digital (as opposed to analog) simulation allowing simulation times to be reduced by a factor of several thousand. In addition, new testing methods become available with 100% coverage and increased simplicity. One of the fundamental qualities of an abstraction tool should be the formal nature of its operation. The more the behaviour of the model is true to the minute details of the original circuit, the more the different validation phases can be applied to the model without introducing any risk. learn more...
The most common methods for the verification of transistor-level circuits (analog simulation, symbolic simulation) are costly in terms of time and IT resources. As a result, test coverage of complex circuits is often compromised, and finding bugs from simulation results can be a long and difficult process. Transistor abstraction is a process which produces a much more compact and higher level view of the circuit behaviour. Such abstraction permits digital (as opposed to analog) simulation allowing simulation times to be reduced by a factor of several thousand. In addition, new testing methods become available with 100% coverage and increased simplicity. One of the fundamental qualities of an abstraction tool should be the formal nature of its operation. The more the behaviour of the model is true to the minute details of the original circuit, the more the different validation phases can be applied to the model without introducing any risk. learn more...
