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TLL™

TLL is a transistor abstraction tool. It transforms a complex electronic circuit (e.g. Spice CDL or Verilog netlist) into an equivalent logic model in Verilog or VHDL. The heart of the tool consists of an algorithm which makes electrical computations, unlike traditional abstraction tools, which are essentially based on structure recognition. This characteristic brings a unique quality to the resulting abstraction. The tool is capable of detecting electrical conflicts statically with the same precision that analog simulation achieves dynamically. The tool also contains powerful automated algorithms dedicated to the detection of cyclic parts of circuits. These parts can then be replaced by specific HDL models, compatible with standard VHDL/Verilog tools. In addition to its very precise abstraction capability, TLL is very fast and consumes little memory. It is capable of abstracting designs running to hundreds of millions of transistors. learn more...